View AS2350_226657.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Secondary Side Housekeeping Circuit
Features
* Standard PC Power Good: UV Detection on 4 rails UV Detection of AC/Bulk supply OV Detection on 4 rails Open collector PG out * Pogrammable Fault output: OV OV plus UV OV plus UV after startup delay * OV Crow Bar Driver * Digital ON/OFF input * 2.5V Voltage Reference * Operates from 5V or 12V rail
AS23xx
Description
The AS23xx is a housekeeping circuit for monitoring the outputs of power supplies. It directly senses all the output rails without the need for external dividers and detects undervoltage and overvoltage. It also provides an additional undervoltage comparator which may be configured with any arbitrary hysteresis to sense a divided down representation of the AC bulk voltage. The housekeeping section provides all the features necessary to allow external caps to set the common timing features of PC type power supplies. In addition, negative rails may be sensed without the necessity of a VEE connection, and negative sensing may be disabled without affecting operation of the positive sense section. The 2.5 V series reference is available and can source up to 5 mA. This IC is available in 16 lead packages. Outputs include a POK (Power OK) and a fault signal. The AS2333 includes sensing for 12 V, 5 V, and 3.3V. The AS2350 exchanges a -5 V sense capability for the 3.3 V input. The AS2316 monitors all supply voltages, but lacks CBD (Crow-Bar Driver).
Top view
VCC +12V +5V -5V -12V GND HYST OFF 1 2 3 4 5 6 7 8 16 CBD 15 FAULT 14 VREF 13 UVB 12 DELAY 11 POK 10 PGCAP 9 AC
Pin Configuration --
VCC +12V +5V +3.3V -5V -12V GND HYST 1 2 3 4 5 6 7 8 16 FAULT 15 VREF 14 UVB 13 DELAY 12 POK 11 PGCAP 10 AC 9 OFF
VCC +12V +5V +3.3V -12V GND HYST OFF
1 2 3 4 5 6 7 8
16 CBD 15 FAULT 14 VREF 13 UVB 12 DELAY 11 POK 10 PGCAP 9 AC
AS2316 SOIC
VCC +12V +5V +3.3V -5V -12V GND HYST
1 2 3 4 5 6 7 8
16 FAULT 15 VREF 14 UVB 13 DELAY 12 POK 11 PGCAP 10 AC 9 OFF
AS2333 SOIC
VCC +12V +5V +3.3V -12V GND HYST OFF
1 2 3 4 5 6 7 8
16 CBD 15 FAULT 14 VREF 13 UVB 12 DELAY 11 POK 10 PGCAP 9 AC
AS2350 SOIC
VCC +12V +5V -5V -12V GND HYST OFF
1 2 3 4 5 6 7 8
16 CBD 15 FAULT 14 VREF 13 UVB 12 DELAY 11 POK 10 PGCAP 9 AC
AS2316 PDIP
AS2333 PDIP
AS2350 PDIP
Ordering Information
Package
16-Pin Plastic SOIC 16-Pin Plastic SOIC 16-Pin Plastic SOIC 16-Pin Plastic DIP 16-Pin Plastic DIP 16-Pin Plastic DIP
(c) ASTEC Semiconductor
Temperature Range
0 to 105 C 0 to 105 C 0 to 105 C 0 to 105 C 0 to 105 C 0 to 105 C
Order Code
AS2316D AS2333D AS2350D AS2316N AS2333N AS2350N
91
AS23xx
Functional Block Diagram
VREF
nUV
Secondary Side Housekeeping Circuit
UV
VCC
VCC
GND
+12V VCC
R Latch S nUVLatch
Q
nRESET
OV
nO V t 20 s delay nO VLatch
FAULT
UV
R Latch QS
+5V
OV
nFAULT
VCC C BD Latch p owers up in RESET state.
SQ Latch
UV
+3.3V
nRESET
R
C BD
500 OV nO V
VCC
OV nUV
nUV Latch
1A
VREF VCC
UVB
UV
- 5V
HYST
VREF
Disab le
VCC
1A nO V OV t 20 s delay
PGC AP
nPO K
nUV UV
VCC POK VREF
- 12V VREF
Disab le
VREF AC VREF
nAC WARNING nFAULT
VCC
1A
DELAY HYST VCC
nRESET
VREF
2.5V chip b ias
VREF
OFF
nO FF WARNING
ASTEC Semiconductor
92
Secondary Side Housekeeping Circuit
Pin Function Description (For AS2333 / AS2350)
Pin Number Function Description
AS23xx
1 2 3 4 5 6 7 8
VCC +12 V +5 V +3.3/-5 V -12 V GND HYST OFF
Power input to the chip. Input for overvoltage and undervoltage for the +12 V rail. Input for overvoltage and undervoltage for the +5 V rail. Input for overvoltage and undervoltage for the +3.3V rail or -5 V rail, depending on product option. Input for overvoltage and undervoltage for the -12 V rail. This function may disabled by tying this pin to a positive voltage above 2.4 V. Signal ground and silicon substrate. Open collector output of the AC undervoltage comparator. A resistor between this pin and AC will provide hysteresis to the AC undervoltage sensing. Pulling this pin low will reset the FAULT latch and discharge the start-up timing capacitors, UVB and PG CAP, allowing normal start-up for the system. Pulling this pin high will send the FAULT signal high, prompting a system shutdown. Non-inverting input to the AC undervoltage sensing comparator. If the AC pin is less than 2.5 V, POK goes low and UVB cap discharges. A cap to ground provides a delay between undervoltage sensing becoming good and the POK output going high. Cap discharges whenever an output or AC undervoltage is detected. Open collector output of the undervoltage sensing comparators. This pin goes low upon an undervoltage condition. Except for the delay set by the PG CAP, this pin always reflects the actual state of the undervoltage sensing. A cap to ground will delay the FAULT signal when the OFF pin is used to shut down the system. The POK will signal a power fail warning immediately, but the FAULT shutdown of the power supply will be delayed. A cap to ground provides start-up blanking of the undervoltage sensing portion of the FAULT signal. This pin may also be grounded to prevent undervoltage conditions from triggering the FAULT signal. This pin discharges the cap whenever AC goes low or FAULT pin goes high. 2.5 V Voltage reference. This is a series regulator type reference. Open collector output of the overvoltage and undervoltage comparators. Crow bar drive output of the overvoltage faults only.
9 10
AC PG CAP
11
POK
12
DELAY
13
UVB
14 15 16
VREF FAULT CBD
ASTEC Semiconductor
93
AS23xx
Secondary Side Housekeeping Circuit
Pin Function Description (For AS2316)
Pin Number Function Description
1 2 3 4 5 6 7 8 9
VCC +12 V +5 V +3.3 -5 V -12 V GND HYST OFF
Power input to the chip. Input for overvoltage and undervoltage for the +12 V rail. Input for overvoltage and undervoltage for the +5 V rail. Input for overvoltage and undervoltage for the +3.3V rail. Input for overvoltage and undervoltage for the -5 V rail. Input for overvoltage and undervoltage for the -12 V rail. This function may disabled by tying this pin to a positive voltage above 2.4 V. Signal ground and silicon substrate. Open collector output of the AC undervoltage comparator. A resistor between this pin and AC will provide hysteresis to the AC undervoltage sensing. Pulling this pin low will reset the FAULT latch and discharge the start-up timing capacitors, UVB and PG CAP, allowing normal start-up for the system. Pulling this pin high will send the FAULT signal high, prompting a system shutdown. Non-inverting input to the AC undervoltage sensing comparator. If the AC pin is less than 2.5 V, POK goes low and UVB cap discharges. A cap to ground provides a delay between undervoltage sensing becoming good and the POK output going high. Cap discharges whenever an output or AC undervoltage is detected. Open collector output of the undervoltage sensing comparators. This pin goes low upon an undervoltage condition. Except for the delay set by the PG CAP, this pin always reflects the actual state of the undervoltage sensing. A cap to ground will delay the FAULT signal when the OFF pin is used to shut down the system. The POK will signal a power fail warning immediately, but the FAULT shutdown of the power supply will be delayed. A cap to ground provides start-up blanking of the undervoltage sensing portion of the FAULT signal. This pin may also be grounded to prevent undervoltage conditions from triggering the FAULT signal. This pin discharges the cap whenever AC goes low or FAULT pin goes high. 2.5 V Voltage reference. This is a series regulator type reference. Open collector output of the overvoltage and undervoltage comparators.
10 11
AC PG CAP
12
POK
13
DELAY
14
UVB
15 16
VREF FAULT
ASTEC Semiconductor
94
Secondary Side Housekeeping Circuit
Absolute Maximum Ratings
Parameter Symbol Rating
AS23xx
Unit
Supply Voltage Continuous Power Dissipation at 25 C Junction Temperature Storage Temperature Range Lead Temperature, Soldering 10 Seconds
VCC PD TJ TSTG TL
20 1000 150 - 65 to 150 300
V mW C C C
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended Conditions
Parameter Supply Voltage Symbol VCC Rating 5 - 12 Unit V
Typical Thermal Resistance
Package 16L SOIC 16L PDIP JA 65 C/W 80 C/W JC 45 C/W 35 C/W Typical Derating 10.0 mW/C 12.5 mW/C
Electrical Characteristics
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105 C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are VCC = 12 V; +3.3 V = 3.3 V; +5 V = 5V; +12 V = 12 V; -12 V = -12 V; - 5 V = - 5 V; OFF = low. Parameter Bias Supply Current Min. VCC for operation Undervoltage, Overvoltage +3.3 V (Not available on AS2350) +3.3 V Undervoltage +3.3 V Overvoltage +3.3 V Input Current +5 V +5 V Undervoltage +5 V Overvoltage +5 V Input Current +12 V +12 V Undervoltage +12 V Overvoltage +12 V Input Current UV OV IB V+12 =+12.0V 10.25 14.53 10.50 14.90 0.8 10.60 15.27 1.5 V V mA UV OV IB V+5 =+5.0V, V+3.3 =+3.3V 4.40 5.74 4.50 5.89 1.6 4.60 6.04 2.5 V V mA UV OV IB V+3.3 =+3.3V, V+5 =+5.0V 2.87 3.76 -0.1 2.95 3.86 0 3.03 3.96 0.1 V V mA ICC VCC Min. no faults VREF = 2.5 V, no faults 8 12 4.2 mA V Symbol Test Condition Min Typ Max Unit
ASTEC Semiconductor
95
AS23xx
Electrical Characteristics
(cont'd)
Secondary Side Housekeeping Circuit
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105 C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are VCC = 12 V; +3.3 V = 3.3 V; +5 V = 5V; +12 V = 12 V; -12 V = -12 V; - 5 V = - 5 V. Parameter -5 V (Not available on AS2333) -5 V Undervoltage -5 V Overvoltage -5 V Input Current -5 V Disable Voltage -12 V -12 V Undervoltage -12 V Overvoltage -12 V Input Current -12 V Disable Voltage AC/HYST AC Undervoltage AC Input Current HYST High State Leakage HYST Output Current HYST Low Voltage Outputs POK High State Leakage POK Output Current FAULT High State Leakage FAULT Output Current IL IOL IL VOL VPOK = 12 V; no faults VPOK = 0.4 V; VCC = 7 V undervoltage condition VFAULT = 12 V; OFF = High VFAULT = 0.4 V; no faults VCC = 12 V VCC = 5 V overvoltage condition ICBD = 0 mA; T = 25 C ICBD = 0 mA; T = 105 C; overvoltage condition ICBD = 1 mA; no faults 3 1.3 - 25 2.0 1.4 300 5 100 10 0.01 10 4 -35 2.5 3.0 3.3 1000 1 200 A mA A mA mA mA V V 1000 UV IB IL IOL VOL VHYST = 5 V; AC > 2.5 V VHYST = 0.3 V; AC < 2.5 V IHYST = 1 mA; AC < 2.5 V 1 TJ = 25 C 2.460 2.520 - 0.5 0.01 3 0.3 2.540 -1 1 V A A mA V UV OV IB VD V-12 =-12.0V Minimum voltage to disable -9.20 -14.55 -9.55 -15.04 - 100 2.0 -9.80 -15.60 -200 2.2 V V A V UV OV IB VD V-5 =-5.0V Minimum voltage to disable - 3.80 - 6.00 - 4.00 - 6.25 -80 2.3 - 4.20 - 6.55 -150 2.4 V V A V Symbol Test Condition Min Typ Max Unit
CBD (Crow Bar Drive) Minimum Output Current CBD Output High Voltage
IOH VOH
CBD Pulldown Resistance
ROUT
500
ASTEC Semiconductor
96
Secondary Side Housekeeping Circuit
Electrical Characteristics
(cont'd)
AS23xx
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105 C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are VCC = 12 V; +3.3 V = 3.3 V; +5 V = 5V; +12 V = 12 V; -12 V = -12 V; - 5 V = - 5 V. Parameter Voltage Reference Output Voltage Line Regulation Load Regulation Temperature Deviation* Start-Up Functions UVB Pull-up Current Source UVB Clamp UVB Discharge Current (AC shutdown) UVB Discharge Current (FAULT shutdown) UVB Low Output Voltage PG CAP Pull-up Current Source PG CAP Clamp PG CAP Discharge Current PG CAP Low Output Voltage OFF Input High Voltage OFF Input Low Voltage OFF Pull-up to VCC DELAY Pull-up Current Source DELAY Clamp DELAY Discharge Current DELAY Low Output Voltage IOH VOH MAX IUVB IOL VOL IOH VOH MAX IOL VOL VIH VIL R IOH VOH MAX IOL VOL VOFF = 0 V VDELAY = 0 V; OFF = high IDELAY = 10 A; OFF = high VDELAY = 2.0 V; OFF = low IDELAY = 100A; OFF = low 25 - 0.5 2.9 2.5 50 -1 3.1 10 0.2 VUVB = 2.0 V; no faults IUVB = 10 A; no faults VUVB = 2.0 V; FAULT = low; AC < 2.5 V VUVB = 2.0 V; FAULT = high; AC > 2.5 V IUVB = 100 A; FAULT = low; AC < 2.5 V VPGCAP = 2.0 V; no faults IPGCAP = 10 A; no faults; AC > 2.5 V VPGCAP = 2.0 V; undervoltage condition IPGCAP = 100A; undervoltage condition 2.0 0.8 100 -2.0 3.3 - 0.5 2.9 2 -1 3.1 6 0.2 - 0.4 2.9 3 2.5 -1 3.1 8 10 0.2 -1.4 3.3 -1.9 3.3 A V mA mA V A V mA V V V k A V mA V VREF VREF VREF VREF IREF = 0 mA, TJ = 25 C VCC = 5 V to 15 V IREF = 0 V to -5 mA 0 < TJ < 105 C 2.488 2.500 10 10 10 2.525 15 15 15 V mV mV mV Symbol Test Condition Min Typ Max Unit
*Temperature deviation is defined as the maximum deviation of the reference over the given temperature range and does not imply an incremental deviation at any given temperature.
Typical Performance Curves
Not Available at Time of Publishing
ASTEC Semiconductor
97
AS23xx
Theory of Operation
Secondary Side Housekeeping Circuit
the outputs of the PSU. Usually, just one or the other output is used depending on the PSU's cost and system definition. Both methods are intended to protect the customer's system, and the customer, as the first priority. 1.2 Undervoltage Faults: POK and FAULT An undervoltage condition is sometimes not considered a catastrophic or dangerous condition, but always one which the customer should be warned about. The POK signal is a logic line to the customer's system that is specified in most PC type power supply systems. The AS23xx will pull the POK signal low when a UV fault is detected. A UV fault may or may not require the system to shut down, so an undervoltage blanking pin is provided (UVB). Grounding this pin will prevent UV faults from propogating to the FAULT pin. CBD does not react to UV faults. 1.3 Input Undervoltage: AC and HYST In addition, there is a special undervoltage detection input for sensing the input voltage to the power supply, designated as the AC pin. This pin will cause the POK pin to go low if there is insufficient voltage to run the PSU outputs. Since power supplies must maintain high voltage isolation between the primary and secondary sides of the system, the AC pin is usually tied to a divided down and filtered representation of the secondary side switching waveform. Hysteresis for this function, to provide immunity from line ripple, is configured by the PSU designer and is implemented with the HYST pin, which is an open collector output of the AC comparator.
The AS23xx performs housekeeping functions for power supplies, especially switching power supplies for personal computers. The chip resides on the secondary side of the power supply (PSU), and it performs three primary functions: 1) monitors the output voltages and reports faults 2) sequences the start-up of the PSU 3) sequences the shutdown of the PSU
Section 1 - Output Voltages and Faults 1.0 Output Voltage Monitoring The AS23xx monitors the standard voltage outputs for PC type power supplies. It has inputs for +12 V, +5 V, +3.3 V, -5 V and -12 V. These inputs are tied directly to the outputs of the PSU, and therefore do not require external dividers to set the error thresholds. These pins are monitored for both overvoltage (OV) and undervoltage (UV) conditions. The spec's for these thresholds are listed in the data sheet. 1.1 Overvoltage Faults: FAULT and CBD An overvoltage condition in a power supply is considered to be a catastrophic and dangerous condition which must result in a safe, complete and near-instantaneous shutdown of the system. Overvoltages most often result from a break in the system feedback and control circuitry or from a short between outputs. When the AS23xx detects an overvoltage, the fault is latched internally, and the FAULT and CBD pins go high. The FAULT pin is an open collector NPN output which is intended to drive an optocoupler LED for feedback to the primary side controller of the PSU. The CBD pin is an NPN Darlington output which is intended to drive an SCR crowbar circuit which will short circuit
ASTEC Semiconductor
Section 2 - PSU Start-up Sequences 2.0 System Start-up Sequence When the power supply starts up, the AS23xx must not erroneously report a FAULT. In addition, most PC type power supply specifications
98
Secondary Side Housekeeping Circuit
require a specific timing sequence for the POK signal. Some PSU systems also require an isolated, low voltage, low power remote turn-on switch, rather than a large line cord switch. 2.1 VREF Enable of Chip Bias Since the VCC of the AS23xx comes up in a finite amount of time, and since the VREF of the chip and the bias for the comparators are not within specification until approximately 4.2 V of VCC is available, the comparators for OV and UV and most other functions are disabled until VREF is within spec. This prevents the false detection of a FAULT due to an erroneous VREF. Similarly, if VREF is too heavily loaded and gets pulled low out of spec, these functions will also shut off. 2.2 Blanking UV's During Start-up: UVB As the power supply outputs come up, the undervoltage FAULTs must be blanked to allow the supply to complete its start-up. Putting a capacitor to ground on the UVB pin will allow the PSU designer to set a specific period of time during which undervoltages will not propogate to the FAULT pin. The UVB pin provides a 1 A current source to charge the cap, and once the UVB pin charges above 2.5 V, the undervoltage sensing is enabled. UVB does not blank undervoltages to the POK pin. The UVB pin is clamped one diode above VREF, or about 3.1 V, allowing fast discharge of the capacitor when the system resets. 2.3 POK Bias The POK pin has some specific requirements based on industry standard PC power supply specifications. At start-up, the POK pin must not rise above 0.4 V. The POK pin is an NPN open collector whose base is tied to VCC via a simple resistor. Therefore, once VCC pulls above one diode or about 0.6 V, the POK pin will go low and saturate. If the POK pin external pull-up is to the 5 V output, the POK signal will not go above 0.4
ASTEC Semiconductor
AS23xx
V if the VCC of the AS23xx is tied to the 12 V output or an auxilliary rail. 2.4 POK Start-up Timing: PGCAP In addition to 2.3 above, most PC power supplies require the POK pin to remain low until all outputs have been good for at least 100 ms but not more than 500 ms. A cap to ground on the PGCAP pin allows to the PSU designer to set the timing delay between the PSU outputs becoming good and the POK pin going high. The PGCAP pin provides a 1 A current source to charge the cap, and when the cap charges above 2.5 V, the POK pin goes high. When an undervoltage occurs, the PGCAP pin discharges rapidly and the POK pin goes low. The POK pin does not respond to overvoltages. 2.5 Isolated Remote On/Off Switching: OFF and FAULT A low voltage, isolated remote on/off switch may be implemented with the AS23xx OFF pin. If the chip VCC is run off an auxilliary rail, the FAULT signal may be used to start and stop the PSU. When the OFF pin is pulled from high to low or grounded, the FAULT pin resets to a low state, which may be used to drive an optocoupler to enable the primary side PWM controller. Allowing the OFF pin to go open circuit or high causes the POK pin to go low immediately, and the FAULT pin will go high after a time delay set by a cap to ground on the DELAY pin. This allows the customer's system to receive a POK warning before the PSU actually shuts down.
Section 3 - PSU Shutdown Sequences 3.0 Shutdown Sequence For normal shutdowns, the primary requirement is that the POK signal should go low some minimum time before the PSU outputs fall out of spec.
99
AS23xx
3.1 Delaying Remote OFF: DELAY
Secondary Side Housekeeping Circuit
3.2 AC Warning Prior to Primary Drop-out In systems where the input line voltage is switched, the AC pin threshold should be set so that it causes POK to go low before the primary bulk voltage reaches drop-out and the primary PWM shuts off. The output of the AC comparator also causes the UVB pin to pull low, so that the undervoltage sensing does not trip the FAULT latch as the outputs fall below spec. Recall that the AC pin senses a divided down and filtered representation of the secondary side switching waveform, which will provide a proportional representation of the primary voltage via the turns ratio of the transformer.
In systems which use the OFF and FAULT pins to provide remote on/off switching, the delay between the OFF pin going high and the FAULT signal going high is programmable with a capacitor to ground on the DELAY pin as described in 2.5 above. The POK pin, on the other hand will go high immediately after the OFF pin is open circuited or pulled high, giving the system warning of the impending shutdown. The DELAY pin provides a 1 A current source to charge the cap, and when the cap charges above 2.5 V, the FAULT pin will go high.
ASTEC reserves the right to make changes without further notice to any products described herein to improve reliability, function, or design. ASTEC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights or the rights of others. ASTEC products are not authorized for use as components in life support devices or systems intended for surgical implant into the body or intended to support or sustain life. Buyer agrees to notify ASTEC of any such intended end use whereupon ASTEC will determine availability and suitability of its products for the intended use. ASTEC and the ASTEC logo are trademarks of ASTEC (BSR) PLC.
ASTEC SEMICONDUCTOR
255 Sinclair Frontage Road * Milpitas, California 95035 * Tel. (408) 263-8300 * FAX (408) 263-8340
ASTEC Semiconductor
100

▲Up To Search▲

Price & Availability of AS2350

	To Download AS2350 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .